研究者業績

関屋 大雄

セキヤ ヒロオ  (Hiroo Sekiya)

基本情報

所属
千葉大学 大学院情報学研究院 教授
湘潭大学 Xiangtan University Honored Professor
長崎総合科学大学 客員教授
学位
博士(工学)(慶應義塾大学)

ORCID ID
 https://orcid.org/0000-0003-3557-1463
J-GLOBAL ID
200901086143684628
researchmap会員ID
1000357243

外部リンク

令和6年-      千葉大学大学院情報学研究院教授
平成30年-令和6年 千葉大学大学院工学研究院 教授
平成28年-平成30年 千葉大学大学院融合科学研究科 教授
平成27年-令和2年 湘潭大学(Xiangtan University) Honorary Professor
平成23年-平成28年 千葉大学大学院融合科学研究科 准教授
平成20年-平成22年 Wright State University 訪問研究員(日本学術振興会海外特別研究員)
平成19年-平成23年 千葉大学大学院融合科学研究科 助教
平成13年-平成19年 千葉大学大学院自然科学研究科 助手

平成13年 慶應義塾大学院理工学研究科電気工学専攻博士課程修了 博士(工学)


受賞

 7

論文

 139
  • Wenqi Zhu, Yutaro Komiyama, Ayano Komanaka, Kien Nguyen, Hiroo Sekiya
    IEEE Transactions on Industrial Electronics 71(9) 10433-10443 2024年9月1日  
    This article presents a load-independent zero-current switching (ZCS) parallel-resonant inverter with a constant output current. The proposed inverter features constant-current output inherently without the need for any control method. Moreover, ZCS is achieved despite load variations, ensuring high power efficiency even at MHz-order switching frequencies. We conduct a comprehensive circuit analysis of the proposed inverter and provide a step-by-step parameter design method for achieving load-independent conditions. Additionally, a 25 W, 1 MHz prototype of the proposed inverter was implemented. In the circuit experiment, constant current output and ZCS were achieved across the entire range of load variations, which demonstrated the effectiveness of the proposed load-independent inverter.
  • Hisa Aki Tanaka, Yoji Yabe, Somei Suga, Akira Keida, Kai Maeda, Fumito Mori, Hiroo Sekiya
    EPL 146(5) 2024年6月  
    Synchronisability of limit cycle oscillators has been measured by the width of the synchronous frequency band, known as the Arnold tongue, concerning external forcing. We clarify a fundamental limit on maximizing this synchronisability within a specified extra low power budget, which underlies an important and ubiquitous problem in nonlinear science related to an efficient synchronisation of weakly forced nonlinear oscillators. In this letter, injection-locked Class-E oscillators are considered as a practical case study, and we systematically analyse their power consumption; our observations demonstrate the independence of power consumption in the oscillator from power consumption in the injection circuit and verify the dependency of power consumption in the oscillator solely on its oscillation frequency. These systematic observations, followed by the mathematical optimisation establish the existence of a fundamental limit on synchronisability, validated through systematic circuit simulations. The results offer insights into the energetics of synchronisation for a specific class of injection-locked oscillators.
  • Hiroo Sekiya
    Wireless Power Transfer Technologies: Theory and technologies 89-117 2024年1月1日  
  • Yue Su, Yang Xiang, Kien Nguyen, Hiroo Sekiya
    Proceedings - 2024 IEEE 48th Annual Computers, Software, and Applications Conference, COMPSAC 2024 1572-1573 2024年  
    The fusion of IoT and Blockchain (i.e., IoT-Blockchain) promisingly revolutionizes numerous domains. However, IoT-Blockchain systems may face scalability challenges due to a large number of IoT devices and blockchain performance. Sharding, which divides the blockchain into smaller groups, offers a solution to enhance blockchain scalability. However, most previous sharding research typically considers even node distribution in a shard (i.e., a fixed node number). Hence, it may not capture the characteristics of IoT- Blockchain systems well, where nodes are diversely distributed. This paper investigates a new scenario of shards having unevenly distributed nodes, aiming to see the impacts of the scenario on sharding protocols. More specifically, we evaluate the BrokerChain protocol on the sharding-based emulation platform (i.e., BlockEmulator) in scenarios with even and uneven node distributions. The results show that the protocol performance degrades with the uneven node distribution, suggesting the need for a dynamic sharding protocol.
  • Koki Koshikawa, Jong Deok Kim, Won Joo Hwang, Kien Nguyen, Hiroo Sekiya
    IEEE Vehicular Technology Conference 2024年  
    Blockchain holds significant potential in addressing the security, privacy, decentralization, and interoperability challenges prevalent in the Internet of Things (IoT), However, this advancement often comes at the expense of scalability. Therefore, enhancing the scalability of IoT blockchain systems while preserving other essential blockchain attributes is imperative. This paper aims to mitigate network latency in the blockchain network, a factor directly linked to blockchain scalability. Achieving this goal requires implementing an efficient peer selection method, moving beyond the reliance on default selection (i.e., the one in Bitcoin, Ethereum, etc.). In existing literature, Perigee has been introduced as a method that nearly optimizes the delay in the transaction transmission process. However, Perigee has not comprehensively addressed the complete transaction life cycle, which includes a crucial process-block transmission. In response to this limitation, we propose Dual Perigee, a solution that thoroughly considers and optimizes both transaction-oriented latency (TOL) and block-oriented latency (BOL). To show the effectiveness of Dual Perigee, we implemented and evaluated it within an emulated IoT-Blockchain system, comparing its performance with Perigee and the default peering method in Ethereum. The results reveal that Dual Perigee excels in reducing BOL compared to Perigee. Moreover, Dual Perigee exhibited a latency that was 43% and 80% lower than the default peering method and Perigee, respectively.

MISC

 710
  • 関屋大雄, 長谷宏之, 丹治裕一, LU J, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2004 229 2004年9月8日  
  • 長谷宏之, 関屋大雄, LU J, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2004 2 2004年9月8日  
  • 宮薗敦, 野村行弘, LU J, 関屋大雄, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2004 65 2004年9月8日  
  • 根岸高弘, 山下哲孝, LU J, 関屋大雄, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2004 136 2004年9月8日  
  • 横手俊倫, 関屋大雄, LU J, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2004 110 2004年9月8日  
  • 藤原敏秀, 関屋大雄, 万代雅希, 横手俊倫, LU J, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2004 460 2004年9月8日  
  • 矢崎暁彦, 関屋大雄, 横手俊倫, LU J, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2004 101 2004年9月8日  
  • Hiroyuki Hase, Hiroo Sekiya, J. Lu, Tbkashi Yahagi
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E87-A(9) 2241-2247 2004年9月  査読有り
    This paper presents a novel design procedure for class E oscillator. It is the characteristic of the proposed design procedure that a free-running oscillator is considered as a forced oscillator and the feedback waveform is tuned to the timing of the switching. By using the proposed design procedure, it is possible to design class E oscillator that cannot be designed by the conventional one. By carrying out two circuit experiments, we find that the experimental results agree with the calculated ones quantitatively, and show the validity of the proposed design procedure. One experimental measured power conversion efficiency is 90.7% under 6.8 W output power at an operating frequency 2.02 MHz, the other is 89.7% under 2.8 W output power at an operating frequency 1.97 MHz.
  • IEICE Trans. on Fundamentals IEICE Trans. on Fundamentals. E87A(9) 2241-2247 2004年9月  
  • IEICE Trans. on Fundamentals E87A(6) 1641-1644 2004年6月  
  • 野村行弘, LU J, 関屋大雄, 谷萩隆嗣
    電子情報通信学会技術研究報告 104(30(SP2004 1-9)) 29-34 2004年4月23日  
  • 野村 行弘, 呂 建明, 関屋 大雄, 谷萩 隆嗣
    電子情報通信学会技術研究報告. EA, 応用音響 104(29) 29-34 2004年4月16日  
    スペクトルサブトラクション法を用いた音声強調において,音声領域と雑音領域との判別は音声の雑音除去と明瞭性の向上の両面から重要である.本研究では,雑音量に依存しない音声領域と雑音領域との判別方法を提案する.提案方法では,雑音成分を減算したスペクトルデータを用いて音声領域と雑音領域との判別を行うことにより,判別時の雑音の影響を低減させる.提案方法についてNOISEX-92の4種類の雑音による性能評価を行う.その結果,提案方法は従来方法より音声/雑音領域の判別が雑音量に依存せず,正確に行われることを示す.提案方法によって強調した音声は雑音除去性能を維持しながら音声ひずみを減少できることを示す.
  • 野村 行弘, 呂 建明, 関屋 大雄, 谷萩 隆嗣
    電子情報通信学会技術研究報告. SP, 音声 104(30) 29-34 2004年4月16日  
    スペクトルサブトラクション法を用いた音声強調において,音声領域と雑音領域との判別は音声の雑音除去と明瞭性の向上の両面から重要である.本研究では,雑音量に依存しない音声領域と雑音領域との判別方法を提案する.提案方法では,雑音成分を減算したスペクトルデータを用いて音声領域と雑音領域との判別を行うことにより,判別時の雑音の影響を低減させる.提案方法についてNOISEX-92の4種類の雑音による性能評価を行う.その結果,提案方法は従来方法より音声/雑音領域の判別が雑音量に依存せず,正確に行われることを示す.提案方法によって強調した音声は雑音除去性能を維持しながら音声ひずみを減少できることを示す.
  • 関屋大雄, 丹治裕一, LU J, 谷萩隆嗣
    電子情報通信学会技術研究報告 103(741(NLP2003 176-190)) 49-54 2004年3月26日  
  • 関屋 大雄, 丹治 裕一, 呂 建明, 谷萩 隆嗣
    電子情報通信学会技術研究報告. NLP, 非線形問題 103(741) 49-54 2004年3月19日  
    本論文では,周期性を有する回路の設計において新たな計算アルゴリズムを提案する.提案するアルゴリズムでは文献[1]で提案された回路の設計アルゴリズムにおいて,Newton法に用いるヤコビ行列を偏微分の定義に基づいた近似式で置き換える.これにより,アルゴリズムの中で変分方程式を導出する必要がなくなるため,回路方程式を陽な形で与える必要もなくなる.提案するアルゴリズムでは,回路構成,および回路の応答のみが必要となるため,既存の回路シミュレータを流用することが可能となる.それにより,回路構成の決定から所望の条件を満足する素子値の導出までを全て計算機上で行うことができ,回路設計,開発に関する効率が大幅に改善されることが期待される.
  • Wang Xiaoqiu, Lu Jianming, Sekiya Hiroo, Yahagi Takashi
    電子情報通信学会総合大会講演論文集 2004(1) 682-682 2004年3月8日  
  • 小倉宗則, 山下哲孝, LU J, 関屋大雄, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2004 113-113 2004年3月8日  
  • 佐藤隆宣, 山下 哲孝, 呂 建明, 関屋 大雄, 岡本 孝英, 谷萩 隆嗣
    信学総大, 2004 112 112-112 2004年3月8日  
  • 小倉 宗則, 山下 哲孝, 呂 建明, 関屋 大雄, 谷萩 隆嗣
    電子情報通信学会総合大会講演論文集 2004 113-113 2004年3月8日  
  • 小倉宗則, 山下哲孝, LU J, 関屋大雄, 谷萩隆嗣
    情報学シンポジウム講演論文集 2004 95-98 2004年1月15日  
  • 長谷 宏之, 関屋 大雄, 呂 建明, 谷萩 隆嗣
    電子情報通信学会技術研究報告. NLP, 非線形問題 103(567) 7-12 2004年1月15日  
    本研究ではE級発振器における新しい設計方法を提案する.提案する設計方法は回路方程式と設計仕様のみを必要とする.設計値の導出のための他の計算過程は計算機により実行する.その結果,従来の設計方法では設計出来ない設計仕様においてもE級発振器を設計することが可能になる.二通りの設計仕様で回路実験を行うことにより,実験結果と計算結果の良好な一致を確認し,提案する設計方法の有効性を示す.一方の実験において測定された電力変換効率は,動作周波数2.02MHz,出力電力6.8Wの条件下において90.7%を実現し,もう一方においては,動作周波数1.97MHz,出力電力2.8Wの条件下において89.7%を実現する.
  • Xiaoqiu Wang, Hua Lin, Jianming Lu, Hiroo Sekiya, Takashi Yahagi
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E87-A(6) 1641-1644 2004年  査読有り
    This paper presents a compensating method based on Self-Organizing Map (SOM) for nonlinear distortion, which is caused by high-power amplifier (HPA) in 16-QAM-OFDM system. OFDM signals are sensitive to nonlinear distortions and different methods are studied to solve them. In the proposed scheme, the correction is done at the receiver by a SOM algorithm. Simulations are carried out considering an additive white Gaussian (AWG) transmission channel. Simulation results show that the SOM algorithm brings perceptible gains in a complete 16-QAM-OFDM system.
  • H Hase, H Sekiya, J Lu, T Yahagi
    2004 47TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGS 1 33-36 2004年  
    This paper presents a novel design procedure for class E oscillator. It is the characteristic of the proposed design procedure that a free-running oscillator is considered as a forced oscillator and the feedback waveform is tuned to the timing of the switching. By using the proposed design procedure, it is possible to design class E oscillator that cannot be designed by the conventional one. By carrying out a circuit experiment, we find that the experimental result agrees with the calculated one, and show the validity of the proposed design procedure. The experimental measured power conversion efficiency is 89.7% under 2.8W output power at an operating frequency 1.97MHz.
  • XQ Wang, JM Lu, H Sekiya, T Yahagi
    2004 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXP (ICME), VOLS 1-3 3 1899-1902 2004年  
    This paper presents a compensating method based on Self-Organizing Map (SOM) of nonlinear distortion, which caused by high-power amplifier (HPA) for 16 QAM-OFDM system. OFDM signals are sensitive to nonlinear distortions and different methods are studied to limit them. In the proposed scheme, the correction is done at the receiver by a SOM algorithm. Simulations are carried out considering an additive white Gaussian (AWGN) transmission channel. Simulation results show that the SOM algorithm brings perceptible gains in a complete 16qam-OFDM system.
  • 電子情報通信学会論文誌 A vol. J87-A, no.9, pp. 1254 - 1256, Sep. 2004年  
  • Hiroo Sekiya, Hirotaka Koizumi, Shinsaku Mori, Iwao Sasase, Jianming Lu, Takashi Yahagi
    IEEE Trans. Circuits and Systems I 51(7) 1250-1260 2004年  査読有り
    This paper presents a new control scheme for a Class DE inverter, that is, frequency modulation/pulsewidth modulation (FM/PWM) control. Further, the FM/PWM controlled Class DE inverter is analyzed and we clarify performance characteristics. Since the FM/PWM controlled inverter has two control parameters, namely, the switching frequency and the switch-on duty ratio, it has one more degree of freedom for the control than the inverter with the conventional control scheme. The increased degree of freedom is used to minimize the switching losses. Therefore, it is possible to control the output power with high power-conversion efficiency for wide-range control. Carrying out the circuit experiments, we confirm that the experimental results agree well with the theoretical predictions quantitatively. For example, the proposed controlled inverter can control the output voltage from 56% to 191% of the optimum one, which is designed for 1.8 W at 1.0 MHz, with maintaining over 90% power-conversion efficiency. © 2004 IEEE.
  • 横手俊倫, 関屋大雄, LU J, 谷萩隆嗣
    電子情報通信学会論文誌 A J87-A(9) 1254-1256 2004年  
    本研究では,並列処理を用いたパイプライン型逐次干渉キャンセラを提案する.提案方式ではユーザをグループに分け,グループ内では並列処理を,グループ間ではパイプライン型逐次処理を行う.計算機シミユレーションを行い,提案方式の有効性を示す.
  • 野村行弘, LU J, 関屋大雄, 谷萩隆嗣
    電気学会論文誌 C 124(11) 2310-2319 2004年  
    This paper presents a speech enhancement using the classification between the dominants of speech and noise. In our system, a new classification scheme between the dominants of speech and noise is proposed. The proposed classifications use the standard deviation of the spectrum of observation signal in each band. We introduce two oversubtraction factors for the dominants of speech and noise, respectively. And spectral subtraction is carried out after the classification. The proposed method is tested on several noise types from the Noisex-92 database. From the investigation of segmental SNR, Itakura-Saito distance measure, inspection of spectrograms and listening tests, the proposed system is shown to be effective to reduce background noise. Moreover, the enhanced speech using our system generates less musical noise and distortion than that of conventional systems.
  • 山下哲孝, 小倉宗則, LU J, 関屋大雄, 谷萩隆嗣
    電気学会論文誌 C 124(11) 2378-2379 2004年  
    In this paper, we propose a new impulse noise filtering procedure from images using level detection. In our method, we use directional windows allowing continuity of edge. In our system, an window that is selected from multi-windows includes flat region. Thus, selected window has low variation in pixel values, and enhances the performance of restoration at edge. Extensive simulations indicate that proposed method performs significantly better than traditional methods.
  • 横手俊倫, 関屋大雄, LU J, 谷萩隆嗣
    電子情報通信学会技術研究報告 103(140(SAT2003 14-21)) 13-16 2003年6月23日  
    逐次干渉キャンセラの処理遅延を改善した方法としてパイプライン構造を用いたパイプライン型逐次干渉キャンセラが提案されている.しかしながら,並列干渉キャンセラと比較するとその処理遅延は大きく,また,逐次干渉キャンセラと比較すると誤り率特性の劣化がみられる.本論文では,並列処理を用いたパイプライン型逐次干渉キャンセラを提案する.提案方式ではユーザをグループに分け,グループ内では並列処理を,グループ間では従来のパイプライン型逐次処理を行うことにより,従来のパイプライン型逐次干渉キャンセラよりも処理遅延と誤り率特性を改善する.計算機シミュレーションより,提案方式は従来方式の半分以下の処理遅延で誤り率特性を改善できることを示す.
  • 関屋 大雄, 呂 建明, 谷萩 隆嗣
    電子情報通信学会技術研究報告. NLP, 非線形問題 103(136) 1-6 2003年6月23日  
    本研究ではDE級インバータおよびE級整流器から構成されるDE-E級dc/dcコンバータに対して,位相制御方式を提案する.提案する回路は固定動作周波数の下に負荷変動,入力変動などに対して広範囲に制御することが可能である.さらに離散的でなく,連続的に制御可能である点も強調したい.提案する制御方式に対し,数値計算および回路実験を行う.その結果,これらの結果は非常によく一致することを示す.本研究の回路実験において,動作周波数1MHz,出力2.5Wで, 84%以上の電力変換効率を達成した.
  • 横手 俊倫, 関屋 大雄, 呂 建明, 谷萩 隆嗣
    電子情報通信学会技術研究報告. WBS, ワイドバンドシステム : IEICE technical report 103(138) 13-16 2003年6月16日  
    逐次干渉キャンセラの処理遅延を改善した方法として,パイプライン構造を用いたパイプライン型逐次干渉キャンセラが提案されている.しかしながら,並列干渉キャンセラと比較するとその処理遅延は大きく,また,逐次干渉キャンセラと比較すると誤り率特性の劣化がみられる.本論文では,並列処理を用いたパイプライン型逐次干渉キャンセラを提案する.提案方式ではユーザーをグループに分け,グループ内では並列処理を,グループ間では従来のパイプライン型逐次処理を行うことにより,従来のパイプライン型逐次干渉キャンセラよりも処理遅延と誤り率特性を改善する.計算機シミュレーションより,提案方式は従来方式の半分以下の処理遅延で誤り率特性を改善できることを示す.
  • 山下 哲孝, 呂 建明, 関谷 大雄, 谷萩 隆嗣
    電気学会論文誌. C, 電子・情報・システム部門誌 = The transactions of the Institute of Electrical Engineers of Japan. C, A publication of Electronics, Information and System Society 123(6) 1072-1079 2003年6月1日  
    In signal processing and image processing, many filters have been studied for smoothing images corrupted by noises. In particular, some nonlinear filters have been investigated. In nonlinear filtering, a neural filter was proposed for reducing Gaussian noise. However, a neural filter was not applied to images with impulse noise. In this paper, we propose a filter for removing impulse noise, Gaussian noise and mixed impulse and Gaussian noises using median filters and neural filters. Carrying out the simulation, we illustrate the performance of the proposed filter.
  • 関屋大雄, LU J, 谷萩隆嗣
    電子情報通信学会技術研究報告 102(626(NLP2002 107-113)) 7-12 2003年2月4日  
  • 関屋 大雄, 呂 建明, 谷萩 隆嗣
    電子情報通信学会技術研究報告. NLP, 非線形問題 102(626) 7-12 2003年1月28日  
    DE-E級dc/dcコンバータは1MHz以上という高い動作周波数の下で高電力変換効率が達成可能な回路である.しかしながら,設計をするにあたりいくつかの仮定,理想化を行わなければならないという問題点がある.本研究では. DE-E級dc/dcコンバータにおいて,あらゆる共振回路のQ値およびスイッチの時比率とオン抵抗に対応できる設計方法を提案する.提案する設計方法は,ルンゲ・クッタ法とニュートン法を組み合わせ,設計値の導出を数値的に行うものである.提案する設計方法を用い様々な条件下での設計値,動作特性を示す.さらに回路実験を行い,提案する設計方法の妥当性を示す.
  • Hiroo Sekiya, Iwao Sasase, Shinsaku Mori
    IEICE Transactions on Communications E86-B(10) 3082-3093 2003年  査読有り
    The control of class DE amplifier is an important problem since its switching operations do not satisfy class E switching conditions when the load resistance varies from the initial designed values. Therefore, several of control schemes of class DE amplifier were proposed. However, the changes of the output voltage and the power conversion efficiency by using these controls can be measured only experimentally and thus, they cannot be found theoretically. In this paper, an exact analysis of class DE amplifier with FM and PWM control schemes is presented. From the analysis, we can theoretically derive the output voltage, the power conversion efficiency and so on. Moreover, the frequency and the duty ratio to keep the constant output voltage can be found when the load resistance or the input voltage varies. We indicate that the theoretical predictions are similar to the experimental results quantitatively. The measured efficiency is over 94% with 1.0 MHz and 1.8W output.
  • H Sekiya, S Oshikawa, JM Lu, T Yahagi
    PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL III 3 280-283 2003年  
    This paper presents a new design procedure for class DE amplifier. And the design values and output capabilities of class DE amplifier with any output Q, any duty ratio, and switch on resistance are shown. The main idea of this paper is what the order of the,analysis and design' is changed to 'design and analysis'. If the design values are known, the characteristics of the amplifier can be derived easily by numerical calculations. Carrying out the circuit experiments, we show the validity of the design procedure. Measured efficiency is 93.0% with 1.0-MHz and 1.6-W output.
  • N Yamashita, H Sekiya, JM Lu, T Yahagi
    PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II 2 408-411 2003年  
    In this paper, we propose a new partition-based filter for removing mixed high probability impulse and Gaussian noises by extraction of the signals. The proposed filter sorts the elements of sample vector and extracts the signals around the median from sorted signals. The extraction vector is classified into one of M partitions, and a particular filtering operation is then activated. The output of the filter is estimated by the current pixel and the extraction vector. Carrying out the simulation, we illustrate the peak signal to noise ratio of the proposed filter, and show that it is effective in removing mixed high probability impulse and Gaussian noises.
  • MB Yusoff, H Sekiya, JM Lu, T Yahagi
    INTELEC'03: POWERING THE BROADBAND NETWORK, PROCEEDINGS 713-720 2003年  
    This paper proposes a new control scheme for the class E inverter. This method generates the output voltage and power by thinning out on-pulses of driving signals which turns switch on and off. The advantages of the proposed scheme are the operation at fixed operating frequency, unnecessity of enlargement of the circuit scale, and suitability for controlling wide output range. Especially, the proposed control scheme keeps high efficiency for class E inverter with low loaded quality factor and low input inductance. We carry out numerical analyses and circuit experiments. The laboratory experiments show that the inverter with low quality factor and a small dc-feed inductor maintains the output voltage from 100% to 16% with keeping 68% of power conversion efficiency. The inverter with high quality factor and high dc-feed inductor can be controlled output voltage from 100% to 52% with keeping 53% of power conversion efficiency.
  • 山下哲孝, LU J, 関屋大雄, 谷萩隆嗣
    電気学会論文誌 C 123(6) 1072-1079 2003年  
    In signal processing and image processing,many filters have been studied for smoothing images corrupted by noises. In particular, some nonlinear filters have been investigated. In nonlinear filtering, a neural filter was proposed for reducing Gaussian noise. However, a neural filter was not applied to images with impulse noise. In this paper, we propose a filter for removing impulse noise, Gaussian noise and mixed impulse and Gaussian noises using median filters and neural filters. Carrying out the simulation, we illustrate the performance of the proposed filter. © 2003, The Institute of Electrical Engineers of Japan. All rights reserved.
  • Hiroo Sekiya, Jianming Lu, Takashi Yahagi
    International Journal of Circuit Theory and Applications 31(3) 229-248 2003年  査読有り
    This paper presents a novel design procedure for class E2dc/dc converter. The design procedure requires only circuit equations and design specifications. When the circuit equations are got, the other procedures for the computation of the design values are carried out with aid of computer. Therefore, we can design class E2dc/dc converters with any conditions by using the proposed design procedure. Moreover, we give the design and the performance curves of class E2dc/dc converter and discuss about them. By carrying out the circuit experiments, we show the validity of the proposed design procedure. Copyright © 2003 John Wiley & Sons, Ltd.
  • IEICE Trans. on Communications vol. E86-B, no.10, pp. 3082 - 3093 2003年  
  • 野村行弘, LU J, 関屋大雄, 谷萩隆嗣
    Journal of Signal Processing 6(6) 401-410 2002年11月  
  • 野村 行弘, 呂 建明, 関屋 大雄
    信号処理 6(6) 401-410 2002年11月  
  • 藤本稔, LU J, 関屋大雄, 谷萩隆嗣
    情報科学技術フォーラム FIT 2002(3) 121-122 2002年9月13日  
  • 藤本 稔, 呂 建明, 関屋 大雄, 谷萩 隆嗣
    情報科学技術フォーラム一般講演論文集 2002(3) 121-122 2002年9月13日  
  • Hiroo Sekiya, Hiroo Sekiya, Iwao Sasase, Iwao Sasase, Shinsaku Mori, Shinsaku Mori
    IEEE Trans. Circuits and Systems 49(7) 966-978 2002年7月  査読有り
    This paper presents a novel design procedure for Class E amplifiers without using waveform equations. By the proposed design procedure, Class E amplifiers can be designed regardless of the Q factor of resonant circuit, existence of the switch on resistor, and so on. The proposed design procedure requires only circuit equations and design specifications. All design procedures reported until now require deriving waveform equations which requires a lot of work. The benefits of the proposed design procedure is that it is to deriving waveform equations is no longer necessary. When the circuit equations are obtained, the other procedures for computation of design values are carried out with aid of computer. Therefore, we can design Class E amplifier more easily than the conventional design procedure. The authors design Class E amplifiers by using the proposed design procedures and carry out the circuit experiments, and find that the experimental results agree with calculation results, and show the validity of the proposed design procedure.
  • 野村行弘, LU J, 関屋大雄, 谷萩隆嗣
    電子情報通信学会大会講演論文集 2002 151-151 2002年3月7日  
  • 野村 行弘, 呂 建明, 関屋 大雄, 谷萩 隆嗣
    電子情報通信学会総合大会講演論文集 2002 151-151 2002年3月7日  
  • H Sekiya, J Lu, T Yahagi
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL III, PROCEEDINGS 3 823-826 2002年  
    This paper presents a novel design procedure for class E-2 dc/dc: converter. The design procedure requires only circuit equations and the design specifications. When circuit equations are got, the other procedures for computation of the design values are carried out with aid of computer. Therefore, we can design class E-2 dc/dc converter with any conditions. We carry out the circuit experiments and show the validity of the proposed design procedure.

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