Yuki Dodo, Yukihiko Sato, Tomotake Ito, Sae Mochidate
2016 IEEE 8TH INTERNATIONAL POWER ELECTRONICS AND MOTION CONTROL CONFERENCE (IPEMC-ECCE ASIA) 469-473 2016年 査読有り
Multilevel inverters can reduce harmonics and EMI. Therefore, miniaturization of output filter is realized compared with general 2-level inverters. Especially, flying-capacitor multilevel inverters have an advantage over other multilevel circuit topologies in terms of downsizing. In the flying capacitor topologies, multilevel voltage waveform is generated by the capacitors (called flying capacitors) which maintain their predetermined voltage. In this paper, flying capacitor inverters used in grid-connected applications are investigated. Power density of the inverters is evaluated so that it can be used as a guideline to realize downsizing and loss reduction of the inverters. Firstly, the loss of the power devices, flying capacitors, and interconnection inductors that are major loss components of the inverters are calculated theoretically. Furthermore, the volume of heatsinks for power devices, flying capacitors and interconnection inductors are calculated theoretically. Based on these theoretical results, power density of the inverters is calculated. As a result, it is clarified that the multilevel inverter can reduce the total volume of flying capacitors and interconnection inductors compared with the conventional 2-level inverters. In addition, by increasing the PWM frequency, advantages of the flying capacitor multilevel inverter are maximized. In this study, the maximum power density of the main circuit portion is 4.97W/cm(3) in 2-level inverter, 25.11W/cm(3) in multilevel (9-level) inverter. Thus, it is demonstrated that the multilevel inverter is advantageous to realize high power density inverters.