IEEE TRANSACTIONS ON COMPUTERS 65(12) 3794-3801 2016年12月 [査読有り]
Processing at the nanometric scales presents unique challenges that may require new computational paradigms such as approximate computing. In this paper a novel approach to memory protection using an unequal protection code (UEP) is proposed; this...
IEEE Transactions on Multi-Scale Computing Systems 2(4) 291-296 2016年10月 [査読有り]
This paper presents new codes (and the related encoder/decoder scheme) to address the significant drawback of a phase change memory (PCM), namely that its write latency is significantly longer than the read latency. The proposed scheme improves ov...
IEEE TRANSACTIONS ON COMPUTERS 65(6) 2005-2009 2016年6月 [査読有り]
This manuscript proposes three classes of codes for error correction in a storage system in which the memory cells do not have the same number of levels, i.e., a multiscale storage. The proposed codes are single multiscale-symbol error correction ...
When designing a system on chip (SoC), a test access mechanism (TAM) is required to deliver test data and to collect test responses from cores under test (CUT). To facilitate the network on chip (NoC) testing, test engineers frequently focus on No...
When designing a system on chip (SoC), a test access mechanism (TAM) is required to deliver test data and to collect test responses from cores under test (CUT). To facilitate the network on chip (NoC) testing, test engineers frequently focus on No...
Takieddine Sbiai   Kazuteru Namba   Hideo Ito   
研究報告システムLSI設計技術(SLDM) 2011(9) 1-6 2011年11月
When designing a system on chip (SoC), a test access mechanism (TAM) is required to deliver test data and to collect test responses from cores under test (CUT). To facilitate the network on chip (NoC) testing, test engineers frequently focus on No...